AD7266BSUZ: Dual 12-Bit 2MSPS SAR ADC for Flexible Analog Inputs

ElecSuppliers Part Number ComparisonAug 21, 2026

The AD7266BSUZ is a dual 12-bit successive-approximation ADC designed for high-speed analog data acquisition. Unlike a conventional single-channel converter, the AD7266 contains two ADC cores, with each ADC preceded by a three-channel multiplexer.

This architecture gives the device considerable flexibility. Depending on the input configuration, the AD7266 can support up to 12 single-ended inputs, 6 fully differential inputs, or 6 pseudo-differential inputs while retaining two simultaneous conversion paths.

The AD7266BSUZ is the 32-lead TQFP version of the device, making the complete ordering code particularly relevant when the component is being selected for an existing PCB or production BOM.

AD7266BSUZ Core Architecture

The AD7266 contains two independent 12-bit SAR ADCs rather than one converter shared across all input channels.

Each ADC has a three-channel multiplexer. The selected inputs from the two ADC sections can therefore be converted simultaneously.

This is an important characteristic when comparing the AD7266 with conventional multiplexed ADCs. A system that needs two analog signals sampled at the same conversion instant can use the two ADC cores instead of sequentially switching a single converter between channels.

The architecture is especially useful when multiple sensor or measurement signals need to be monitored while maintaining predictable sampling relationships between selected channels.

AD7266 12-Bit 2MSPS Conversion

The AD7266 provides up to 2MSPS throughput for each ADC.

The combination of 12-bit resolution and high conversion speed places the device between general-purpose embedded ADCs and more demanding high-speed data-acquisition converters.

A 12-bit converter provides 4096 digital levels across the selected input range. At the same time, the 2MSPS throughput allows the host system to collect substantially more samples than would be possible with a low-speed measurement ADC.

The practical benefit depends on the input signal. For slowly changing sensors, the available speed can provide additional sampling margin or allow digital filtering and averaging. For faster signals, it provides the sampling rate needed to preserve more information before digital processing.

AD7266 Flexible Input Configuration

One of the strongest reasons to select the AD7266 is its configurable analog input structure.

The device can be configured for:

12 single-ended inputs

6 fully differential inputs

6 pseudo-differential inputs

This flexibility allows the same ADC architecture to be used in different signal-conditioning designs.

A single-ended configuration is useful when signals are referenced to a common system ground. Differential operation becomes more attractive when the signal source is sensitive to common-mode noise or when the measurement is made across a differential sensor output.

The input configuration therefore has a direct effect on how the external analog circuitry should be designed.

AD7266 Single-Ended Measurement

In single-ended operation, the AD7266 can accommodate up to 12 analog input channels through its two internal multiplexers.

This makes the device useful for systems that need to monitor a relatively large number of individual signals but do not require all of them to be sampled simultaneously.

Examples include industrial monitoring systems, multi-channel instrumentation and embedded measurement equipment.

The multiplexed inputs also allow a single ADC package to replace multiple lower-channel-count converters, potentially reducing board space and component count.

AD7266 Differential Input Design

The differential input capability gives the AD7266 another important advantage over simpler single-ended ADCs.

Differential measurement can improve the handling of signals where the voltage difference between two nodes is more meaningful than the absolute voltage of either node.

It can also provide better immunity to certain common-mode disturbances when the complete signal chain is designed correctly.

However, the ADC input is a switched-capacitor type, so the external driver must be capable of settling the input during acquisition.

Analog Devices specifically recommends buffering higher-impedance signal sources before connecting them to the AD7266. This is particularly important in high-speed differential and single-ended designs.

AD7266 2.5V Internal Reference

The AD7266 includes an internal 2.5V reference.

This simplifies the basic ADC implementation because a separate precision reference is not required for normal operation.

The reference can also be overridden when an external reference is preferred.

This provides additional flexibility for applications where the ADC input range needs to be tied to a system-specific reference voltage.

The reference selection should be considered together with the desired analog input range, signal-conditioning circuit and overall measurement accuracy.

AD7266 Input Range

The analog input range can be configured as 0V to VREF or 0V to 2 × VREF.

With the internal 2.5V reference, these configurations provide different full-scale input ranges.

This feature is particularly useful when the expected sensor or analog signal amplitude does not naturally match a single fixed input range.

For a smaller input signal, the lower range can make better use of the ADC's available codes. A larger signal can take advantage of the extended input range when the application permits it.

The analog front end should therefore be designed around the selected ADC range rather than simply connecting the signal directly to the converter.

AD7266 Sampling and Track-and-Hold

Each ADC incorporates a low-noise, wide-bandwidth track-and-hold amplifier.

The input stage is designed to handle relatively high-frequency signals, with the manufacturer specifying input-frequency capability beyond 30MHz for the track-and-hold circuitry.

This does not mean the ADC can digitize a 30MHz signal at 12-bit accuracy with a 2MSPS sampling rate. The sampling rate, Nyquist requirements, input bandwidth and anti-aliasing design remain separate considerations.

The wide-bandwidth input stage instead gives the analog front end sufficient acquisition capability for the intended high-speed SAR conversion process.

AD7266 No Pipeline Delay

The AD7266 uses SAR conversion and does not introduce pipeline delay.

The conversion begins when the specified sampling event occurs, and the resulting data corresponds directly to that conversion rather than being delayed by several pipeline stages.

This can be useful in control systems and measurement equipment where deterministic sampling and conversion timing are important.

It also makes the device easier to reason about when designing feedback systems in which the timing between an analog event and its digital representation matters.

AD7266 Serial Interface

The AD7266 uses a high-speed serial interface compatible with SPI, QSPI, MICROWIRE and DSP-style interfaces.

The device can provide the conversion results from the two ADCs through separate serial data outputs, or the data can be read sequentially through one serial data path when the system does not have two available serial inputs.

This provides useful flexibility when connecting the ADC to an MCU, DSP or FPGA.

For systems using an FPGA, the serial architecture also allows the digital interface to be customized around the application's sampling and processing requirements.

AD7266BSUZ Package

The AD7266BSUZ uses a 32-lead TQFP package with a body size of approximately 7mm × 7mm.

This distinguishes it from the AD7266BCPZ family variant, which uses a 32-lead LFCSP package.

The two package options are important when replacing the ADC on an existing PCB. Even though they belong to the same AD7266 device family, their mechanical footprints are different.

For this reason, a replacement search based only on the base name AD7266 is not sufficient for PCB-level component replacement.

The complete AD7266BSUZ Part Number should be retained when the TQFP package is required.

AD7266 Power and Throughput

The AD7266 is designed to provide high conversion throughput without requiring excessive power for its performance level.

Analog Devices specifies operation from 2.7V to 5.25V.

Typical power consumption depends on both supply voltage and conversion rate. The manufacturer specifies approximately 9mW at 1.5MSPS with 3V supplies and approximately 27mW at 2MSPS with 5V supplies.

This relationship is useful when estimating the overall power budget of a data-acquisition system.

For applications that do not need maximum throughput continuously, reducing the conversion rate can provide a practical way to reduce ADC power consumption.

AD7266 Applications

The AD7266 is particularly suited to systems where multiple analog signals and high conversion speed need to coexist in the same design.

Its configurable input architecture can be used in industrial data acquisition, instrumentation, sensor interfaces, process monitoring and embedded measurement equipment.

The two ADC cores are especially useful where two selected channels need to be converted simultaneously.

The device can also be attractive when a design needs to switch between multiple single-ended or differential signals without adding a large number of external ADCs.

AD7266BSUZ Selection Considerations

The AD7266BSUZ is most useful when the design requires more than a basic single-channel ADC but does not need a very high-resolution converter.

Its combination of dual 12-bit ADC cores, 2MSPS throughput, configurable input channels, selectable input ranges and an internal reference provides considerable flexibility.

The main design decisions should focus on the required number of physical inputs, whether simultaneous sampling is necessary, the required input configuration, signal bandwidth, reference requirements and available PCB area.

The TQFP package should also be considered early in the design if board space is limited.

AD7266BSUZ Replacement Considerations

Replacing an AD7266BSUZ requires more than matching the 12-bit resolution and 2MSPS sampling rate.

The replacement should also be checked for dual-channel operation, simultaneous conversion capability, input configuration, reference architecture, input range, serial interface, supply voltage and package footprint.

A single ADC with similar headline specifications may not reproduce the AD7266's two-ADC architecture or its flexible 12-channel single-ended configuration.

For existing PCB designs, the 32-lead TQFP package is another critical requirement.

AD7266BSUZ in High-Speed Data Acquisition

The AD7266BSUZ combines a relatively unusual set of features: two 12-bit SAR ADCs, 2MSPS throughput, configurable multi-channel inputs and selectable single-ended or differential operation.

That combination allows one device to serve several different measurement architectures without changing the fundamental ADC.

For engineers working on multi-channel data acquisition, the key advantage is therefore not simply the 12-bit resolution. It is the combination of simultaneous dual conversion and flexible input multiplexing.

That makes the AD7266BSUZ a useful option for compact measurement systems where channel count, conversion speed and analog input configuration all matter.